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Module `dmd.backend.arm.cod3`

Code generation 3

Includes

- generating a function prolog (pushing return address, loading paramters) - generating a function epilog (restoring registers, returning) - generation / peephole optimizations of jump / branch instructions

Compiler implementation of the D programming language.

Documentation

https://dlang.org/phobos/dmd_backend_arm_cod3.html

Coverage

https://codecov.io/gh/dlang/dmd/src/master/compiler/src/dmd/backend/arm/cod3.d

Functions

Name	Description
`assignaddrc(c)`	Replace symbolic references with values
`branch(bl, flag)`	Replace JMPs in Bgotocode with JMP SHORTs whereever possible. This routine depends on FL.code jumps to only be forward referenced. BFL.jmpoptdone is set to true if nothing more can be done with this block.
`calcblksize(c)`	Calculate bl.Bsize.
`calccodsize(c)`	Calculate and return code size of a code. Note that NOPs are sometimes used as markers, but are never output. LINNUMs are never output.
`codout(seg, c, disasmBuf, framehandleroffset)`	Convert instructions to object code and write them to objmod.
`conditionCode(e)`	Equivalent to x86/cod3/jmpopcode
`epilog(b)`	Generate and return function epilog.
`genBranch(cdb, cond, fltarg, targ)`	Generate a jump instruction.
`genmovreg(cdb, to, from, ty)`	Generate a MOV to,from register instruction. Smart enough to dump redundant register moves, and segment register moves.
`gentstreg(cdb, reg, sf)`	Set flags for register contents
`jmpaddr(c)`	Compute jump addresses for FL.code.
`loadFloatRegConst(cdb, vreg, value, sz)`	Load constant floating point value into vreg.
`movregconst(cdb, reg, value, flags)`	Move constant value into reg. Take advantage of existing values in registers. If flags & mPSW set flags based on result Else if flags & 8 do not disturb flags Else don't care about flags If flags & 1 then byte move If flags & 2 then short move (for I32 and I64) If flags & 4 then don't disturb unused portion of register If flags & 16 then reg is a byte register AL..BH If flags & 64 (0x40) then 64 bit move (I64 only)
`orr_solution(value, N, immr, imms)`	See if we can do MOV (bitmask, immediate) out of value.
`prolog_genva_start(sv, parmn)`	Generate elems that implement va_start()
`prolog_genvarargs(cg, cdb, sv)`	Generate special varargs prolog for Posix 64 bit systems.
`REGSAVE_restore(regsave, cdb, reg, idx)`	Restore `reg` from `regsave` area. Complement REGSAVE_save().
`REGSAVE_save(regsave, cdb, reg, idx)`	Generate code to save `reg` in `regsave` stack area.
`WRcodlst(c)`	Debug code to dump code structure.

Authors

Walter Bright

License

Boost License 1.0