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Module core.cpuid
Identify the characteristics of the host CPU, providing information about cache sizes and assembly optimisation hints. This module is provided primarily for assembly language programmers.
References
Some of this information was extremely difficult to track down. Some of the documents below were found only in cached versions stored by search engines! This code relies on information found in:
- "Intel(R) 64 and IA-32 Architectures Software Developers Manual, Volume 2A: Instruction Set Reference, A-M" (2007).
- "AMD CPUID Specification", Advanced Micro Devices, Rev 2.28 (2008).
- "AMD Processor Recognition Application Note For Processors Prior to AMD Family 0Fh Processors", Advanced Micro Devices, Rev 3.13 (2005).
- "AMD Geode(TM) GX Processors Data Book", Advanced Micro Devices, Publication ID 31505E, (2005).
- "AMD K6 Processor Code Optimisation", Advanced Micro Devices, Rev D (2000).
- "Application note 106: Software Customization for the 6x86 Family", Cyrix Corporation, Rev 1.5 (1998)
- http://www.datasheetcatalog.org/datasheet/nationalsemiconductor/GX1.pdf
- "Geode(TM) GX1 Processor Series Low Power Integrated X86 Solution", National Semiconductor, (2002)
- "The VIA Isaiah Architecture", G. Glenn Henry, Centaur Technology, Inc (2008).
- http://www.sandpile.org/ia32/cpuid.htm
- http://www.akkadia.org/drepper/cpumemory.pdf
- "What every programmer should know about memory", Ulrich Depper, Red Hat, Inc., (2007).
- "CPU Identification by the Windows Kernel", G. Chappell (2009). http://www.geoffchappell.com/viewer.htm?doc=studies/windows/km/cpu/cx8.htm
- "Intel(R) Processor Identification and the CPUID Instruction, Application Note 485" (2009).
Bugs
Currently only works on x86 and Itanium CPUs. Many processors have bugs in their microcode for the CPUID instruction, so sometimes the cache information may be incorrect.
Functions
Name | Description |
---|---|
aes()
|
Is AES supported |
amd3dnow()
|
Is AMD 3DNOW supported? |
amd3dnowExt()
|
Is AMD 3DNOW Ext supported? |
amdMmx()
|
Are AMD extensions to MMX supported? |
avx()
|
Is AVX supported |
avx2()
|
Is AVX2 supported |
avx512f()
|
Is AVX512F supported |
cacheLevels()
|
The number of cache levels in the CPU. |
coresPerCPU()
|
Returns number of cores in CPU |
dataCaches()
|
The data caches. If there are fewer than 5 physical caches levels, the remaining levels are set to size_t.max (== entire memory space) |
fma()
|
Is FMA supported |
fp16c()
|
Is FP16C supported |
has3dnowPrefetch()
|
Is 3DNow prefetch supported? |
hasCmov()
|
Is cmov supported? |
hasCmpxchg16b()
|
Is cmpxchg8b supported? |
hasCmpxchg8b()
|
Is cmpxchg8b supported? |
hasFxsr()
|
Is fxsave/fxrstor supported? |
hasLahfSahf()
|
Are LAHF and SAHF supported in 64-bit mode? |
hasLzcnt()
|
Is LZCNT supported? |
hasPclmulqdq()
|
Is pclmulqdq supported |
hasPopcnt()
|
Is POPCNT supported? |
hasRdrand()
|
Is rdrand supported |
hasRdseed()
|
Is rdseed supported |
hasRdtsc()
|
Is rdtsc supported? |
hasSha()
|
Is SHA supported |
hasSysEnterSysExit()
|
Is SYSENTER/SYSEXIT supported? |
hasVpclmulqdq()
|
Is vpclmulqdq supported |
hle()
|
Is HLE (hardware lock elision) supported |
hyperThreading()
|
Is hyperthreading supported? |
isItanium()
|
Is this an IA64 (Itanium) processor? |
isX86_64()
|
Is this an Intel64 or AMD 64? |
mmx()
|
Is MMX supported? |
preferAthlon()
|
Optimisation hints for assembly code. |
preferPentium1()
|
Does this CPU perform better on Pentium I code than Pentium Pro code? |
preferPentium4()
|
Does this CPU perform better on Pentium4 code than PentiumPro..Core2 code? |
processor()
|
Returns processor string, for display purposes only |
rtm()
|
Is RTM (restricted transactional memory) supported |
sse()
|
Is SSE supported? |
sse2()
|
Is SSE2 supported? |
sse3()
|
Is SSE3 supported? |
sse41()
|
Is SSE4.1 supported? |
sse42()
|
Is SSE4.2 supported? |
sse4a()
|
Is SSE4a supported? |
ssse3()
|
Is SSSE3 supported? |
threadsPerCPU()
|
Returns number of threads per CPU |
vaes()
|
Is VEX-Encoded AES supported |
vendor()
|
Returns vendor string, for display purposes only. Do NOT use this to determine features! Note that some CPUs have programmable vendorIDs. |
x87onChip()
|
Does it have an x87 FPU on-chip? |
Structs
Name | Description |
---|---|
CacheInfo
|
Cache size and behaviour |
Global variables
Name | Type | Description |
---|---|---|
datacache
|
CacheInfo[5]
|
Scheduled for deprecation. Please use dataCaches instead.
|
family
|
uint
|
Warning: This field will be turned into a property in a future release. |
model
|
uint
|
Warning: This field will be turned into a property in a future release. |
numCacheLevels
|
uint
|
This field has been deprecated. Please use cacheLevels instead.
|
stepping
|
uint
|
Warning: This field will be turned into a property in a future release. |
Authors
Don Clugston, Tomas Lindquist Olsen <tomas@famolsen.dk>
License
Copyright © 1999-2024 by the D Language Foundation | Page generated by ddox.